On-chip ESD Protection
As the scale of integrated circuit becomes smaller, the challenge for IC manufacturers to maintain reasonable levels of on-chip Electrostatic Discharge (ESD) circuit protection becomes greater. Proposed decreases in on-chip ESD protection mean that system designers must be more aware of building ESD protection into their designs by choosing the right circuit protection devices and following key design principles. On-chip ESD protection is always ignored by manufacturers in order to achieve better chip performance and faster functionality. According to the ESD Association, the ICs will not sustain the current levels of on-chip ESD protection. At the system level, as on-chip ESD protection is reduced, ICs will be more sensitive to transients such as cable discharge events and ESD from the human body. With increased ESD sensitivity of current and future ICs, the need to protect systems with more robust off-chip transient voltage suppression is greater than ever.